The present invention relates to semiconductor packaging and, more particularly, to a lead frame for a semiconductor device that provides thermal dissipation.
A semiconductor die is an integrated circuit formed on a semiconductor wafer, such as a silicon wafer. Such a die is typically cut from the wafer and packaged using a lead frame to form a semiconductor device. The lead frame is a metal frame, usually of copper or nickel alloy, that supports the die and provides the external electrical connections for the packaged chip. The lead frame usually includes a flag or die pad, and associated lead fingers (leads). The semiconductor die is attached to the flag and bond pads on the die are electrically connected to the lead fingers of the lead frame with bond wires. The die and bond wires are encapsulated with a protective encapsulation material to form a semiconductor device. The lead fingers either project outwardly from the encapsulation or are at least flush with the encapsulation but exposed so they can be used as terminals, allowing the semiconductor device to be electrically connected directly to other devices or to a printed circuit board (PCB).
Semiconductor devices are being manufactured with an increased functionality to package pin count (external terminal or I/O count). This is partly because of improved silicon die fabrication techniques that allow die size reductions and thus a semiconductor die can be encapsulated to a form relatively small semiconductor device. However, high density packages have greater power dissipation requirements than lower density packages. The techniques used to dissipate power, primarily in the form of heat, can be a significant cost of the package. Such techniques include: thick die pads with conductive die pad epoxies or high temperature solders for attaching a die to the die pad; dedicated leads integral with the die pad; a heat sink attached to an underside of the die pad; and enlarged electrically obsolete lead frame corner regions that provide a heat sink. All of these techniques compromise package cost or space and are not necessarily directed to thermal dissipation of heat generated at specific thermal hot spot regions of the die.